Meta Runs Google Chips Natively

Meta is now running Google's custom AI chips in its production environments. The social media giant announced today that its PyTorch workloads are executing on Google's Tensor Processing Units, or TPUs, through a new native software integration. This marks a significant shift for the company, which has historically relied heavily on Nvidia hardware for its artificial intelligence training and inference tasks.

The core of this development is a new version of the SGLang inference engine, specifically designed for PyTorch. Previously, running these models on TPUs required using Google's JAX framework, which forced developers to rewrite code or use older, less efficient bridges. The new SGLang-TorchTPU allows the hardware to function as a native option for PyTorch without significant code changes. Zongwei Zhou, the PyTorch-TPU lead at Meta, stated that the engine is "running in production at Meta today" and provides a "remarkably mature, PyTorch-native serving stack." This system resulted from a three-way collaboration between Meta, Google, and the SGLang team at RadixArk.

Meta has long argued that it should not be tied to a single hardware vendor. Jana van Greunen, director of PyTorch engineering at Meta, emphasized that the company "cannot be constrained by a single hardware architecture." By adopting TorchTPU, which Google co-developed with Meta’s PyTorch team, Meta can now deploy its existing PyTorch workloads directly onto Google’s silicon. This follows an earlier, less successful attempt with the PyTorch/XLA bridge, which Meta used from 2020 to 2023 before canceling those contracts. The new native approach aims to eliminate the friction that led to those earlier cancellations.

While the exact location of these chips is not publicly specified, industry reports suggest Meta is leasing Google Cloud TPUs in 2026, with potential purchases planned for 2027. A multi-year rental agreement was reportedly signed following these talks. This move is part of a broader industry trend to reduce dependency on Nvidia. Just one day before this announcement, Amazon open-sourced TorchNeuron, a similar native PyTorch backend for its own Trainium chips, at the same PyTorch Conference. Both moves appear designed to break Nvidia's software lock-in by making other hardware easier to use for developers.

Performance benchmarks suggest the new setup is competitive. Inferact, the startup behind vLLM, reported that a tuned vLLM setup serving Moonshot AI’s 2.8-trillion-parameter Kimi K3 model achieved over 700 tokens per second for a single user on the seventh-generation Ironwood TPU. This test utilized 16 Ironwood chips with speculative decoding, a technique that uses a smaller draft model to speed up inference. In comparison, vLLM’s published setup on 16 Nvidia GB200s reached 452 tokens per second. The new kernels for Kimi K3 and Qwen 3.8 27B reportedly deliver roughly 1.4 to 2 times the throughput of the GB200 baseline at small batch sizes.

The ecosystem support for this new stack is expanding rapidly. SGLang-TorchTPU will continue to add model support, starting with DeepSeek V4.1 Flash and Reflection Beam. RadixArk is also working toward "Day 0" support for new open models, meaning compatibility on release day, by the first quarter of 2027. Developers and stakeholders will get more details on these efforts at the SGLang Summit 2026, scheduled for November 12-13 in San Francisco, where Google, Meta, and RadixArk plan to share further updates.

For readers in the Great Lakes and Ohio Valley, this development matters because it affects the cost and availability of AI services that power local businesses, healthcare data analysis, and regional tech startups. As competition among chipmakers intensifies, the hope is that lower inference costs will trickle down to the applications we use daily, from search engines to creative tools, without requiring users to switch software frameworks.